Invention Application
- Patent Title: HIGH DENSITY SUBSTRATE ROUTING IN BBUL PACKAGE
- Patent Title (中): 高密度基板路由在BBUL包中
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Application No.: US13707159Application Date: 2012-12-06
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Publication No.: US20140159228A1Publication Date: 2014-06-12
- Inventor: Weng Hong Teh , Chia-Pin Chiu
- Applicant: Weng Hong Teh , Chia-Pin Chiu
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/522

Abstract:
Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads.
Public/Granted literature
- US09190380B2 High density substrate routing in BBUL package Public/Granted day:2015-11-17
Information query
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