Invention Application
US20120214103A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH FINE PATTERNS
审中-公开
用精细图案制作半导体器件的方法
- Patent Title: METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH FINE PATTERNS
- Patent Title (中): 用精细图案制作半导体器件的方法
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Application No.: US13030533Application Date: 2011-02-18
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Publication No.: US20120214103A1Publication Date: 2012-08-23
- Inventor: Ming Kang Wei , Pei Lin Huang , Yi Ming Wang , Ying Chung Tseng
- Applicant: Ming Kang Wei , Pei Lin Huang , Yi Ming Wang , Ying Chung Tseng
- Applicant Address: TW Kueishan
- Assignee: NANYA TECHNOLOGY CORP.
- Current Assignee: NANYA TECHNOLOGY CORP.
- Current Assignee Address: TW Kueishan
- Main IPC: G03F7/20
- IPC: G03F7/20

Abstract:
A method for fabricating semiconductor devices with fine patterns includes the steps of providing a semiconductor substrate, forming a first photoresist layer on the semiconductor substrate, forming a second photoresist layer on the first photoresist layer, and performing an exposing process to change the state of at least one first portion of the first photoresist layer and the state of at least one second portion of the second photoresist layer. The conventional double patterning technique requires that the exposure processes be performed twice, which requires very precise alignment between the two exposure processes. In contrast, the embodiment of the present invention can perform the double patterning process with only one exposure process without requiring the precise alignment between the two exposure processes.
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