发明申请
US20120049385A1 WAFER LEVEL CHIP SCALE PACKAGE HAVING AN ENHANCED HEAT EXCHANGE EFFICIENCY WITH AN EMF SHIELD AND A METHOD FOR FABRICATING THE SAME
有权
具有电磁屏蔽效果的增强热交换效率的WAFER LEVEL CHIP SCALE包装及其制造方法
- 专利标题： WAFER LEVEL CHIP SCALE PACKAGE HAVING AN ENHANCED HEAT EXCHANGE EFFICIENCY WITH AN EMF SHIELD AND A METHOD FOR FABRICATING THE SAME
- 专利标题（中）： 具有电磁屏蔽效果的增强热交换效率的WAFER LEVEL CHIP SCALE包装及其制造方法
-
申请号： US13289365申请日： 2011-11-04
-
公开(公告)号： US20120049385A1公开(公告)日： 2012-03-01
- 发明人: Chang Jun PARK , Kwon Whan HAN , Seong Cheol KIM , Sung Min KIM , Hyeong Seok CHOI , Ha Na LEE , Tac Keun OH , Sang Joon LIM
- 申请人： Chang Jun PARK , Kwon Whan HAN , Seong Cheol KIM , Sung Min KIM , Hyeong Seok CHOI , Ha Na LEE , Tac Keun OH , Sang Joon LIM
- 申请人地址： KR Gyeonggi-do
- 专利权人： HYNIX SEMICONDUCTOR INC.
- 当前专利权人： HYNIX SEMICONDUCTOR INC.
- 当前专利权人地址： KR Gyeonggi-do
- 优先权： KR10-2008-0006605 20080122; KR10-2008-0038846 20080425; KR10-2008-0042257 20080507
- 主分类号： H01L23/48
- IPC分类号： H01L23/48 ; H01L21/28
摘要：
A wafer level chip scale package having an enhanced heat exchange efficiency with an EMF shield is presented. The wafer level chip scale package includes a semiconductor chip, an insulation layer, and a metal plate. The semiconductor chip has a plurality of bonding pads on an upper face thereof. The insulation layer is disposed over the upper face of the semiconductor chip and has openings that expose some portions of the bonding pads. The metal plate covers an upper face of the insulation layer and side faces of the semiconductor chip in which the metal plate is electrically insulated from the bonding pads.
公开/授权文献
信息查询
IPC分类:
