Invention Application
- Patent Title: MICROELECTRONIC PACKAGE CONTAINING SILICON CONNECTING REGION FOR HIGH DENSITY INTERCONNECTS, AND METHOD OF MANUFACTURING SAME
- Patent Title (中): 含有高密度互连的硅连接区域的微电子封装及其制造方法
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Application No.: US13161538Application Date: 2011-06-16
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Publication No.: US20110241208A1Publication Date: 2011-10-06
- Inventor: Ravi Mahajan , Sandeep Sane
- Applicant: Ravi Mahajan , Sandeep Sane
- Main IPC: H01L23/48
- IPC: H01L23/48
Abstract:
A microelectronic package comprises a substrate (110), a silicon patch (120) embedded in the substrate, a first interconnect structure (131) at a first location of the silicon patch and a second interconnect structure (132) at a second location of the silicon patch, and an electrically conductive line (150) in the silicon patch connecting the first interconnect structure and the second interconnect structure to each other.
Public/Granted literature
Information query
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