发明申请
US20110193732A1 BANDWIDTH MISMATCH ESTIMATION IN TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTERS 有权
时间间隔模拟数字转换器中的带宽误差估计

BANDWIDTH MISMATCH ESTIMATION IN TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTERS
摘要:
With high speed, high resolution time-interleaved (TI) analog-to-digital converters (ADCs), bandwidth mismatches between the various ADC branches can pose a significant problem. Previously, though, no adequate solution has been found. Here, a method and apparatus are provided that can calculate and compensate for bandwidth mismatches in a TI ADC, enabling a high speed, high resolution TI ADC to be produced.
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