发明申请
US20100117231A1 RELIABLE WAFER-LEVEL CHIP-SCALE SOLDER BUMP STRUCTURE 审中-公开
可靠的水平切割尺寸焊接结构

RELIABLE WAFER-LEVEL CHIP-SCALE SOLDER BUMP STRUCTURE
摘要:
A wafer level chip scale package (WLCSP) includes a semiconductor device with a plurality of solder bump pads, patterned passivation regions above each of the solder bump pads, a patterned under bump metallization (UBM) region on each of the solder bump pads and the passivation regions, a polyimide region over a portion of the UBM regions and the passivation regions, solder bumps formed on each of the UBM regions.
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