发明申请
- 专利标题: Method for Forming Shielded Gate Field Effect Transistor Using Spacers
- 专利标题(中): 用隔板形成屏蔽栅场效应晶体管的方法
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申请号: US12344859申请日: 2008-12-29
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公开(公告)号: US20090111231A1公开(公告)日: 2009-04-30
- 发明人: Thomas E. Grebs , Nathan Lawrence Kraft , Rodney Ridley , Gary M. Dolny , Joseph A. Yedinak , Christopher Boguslaw Kocon , Ashok Challa
- 申请人: Thomas E. Grebs , Nathan Lawrence Kraft , Rodney Ridley , Gary M. Dolny , Joseph A. Yedinak , Christopher Boguslaw Kocon , Ashok Challa
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A trench is formed in a semiconductor region. A dielectric layer lining sidewalls and bottom surface of the trench is formed. The dielectric layer is thicker along lower sidewalls and the bottom surface than along upper sidewalls of the trench. After forming the dielectric layer, a lower portion of the trench is filled with a shield electrode. Dielectric spacers are formed along the upper trench sidewalls. After forming the dielectric spacers, an inter-electrode dielectric (IED) is formed in the trench over the shield electrode. After forming the IED, the dielectric spacers are removed.
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