发明申请
US20080313407A1 LATENCY-AWARE REPLACEMENT SYSTEM AND METHOD FOR CACHE MEMORIES 审中-公开
用于高速缓存存储器的更新代替系统和方法

  • 专利标题: LATENCY-AWARE REPLACEMENT SYSTEM AND METHOD FOR CACHE MEMORIES
  • 专利标题(中): 用于高速缓存存储器的更新代替系统和方法
  • 申请号: US11762358
    申请日: 2007-06-13
  • 公开(公告)号: US20080313407A1
    公开(公告)日: 2008-12-18
  • 发明人: Zhigang HuWilliam Robert Reohr
  • 申请人: Zhigang HuWilliam Robert Reohr
  • 主分类号: G06F13/00
  • IPC分类号: G06F13/00
LATENCY-AWARE REPLACEMENT SYSTEM AND METHOD FOR CACHE MEMORIES
摘要:
A method for replacing cache lines in a computer system having a non-uniform set associative cache memory is disclosed. The method incorporates access latency as an additional factor into the existing ranking guidelines for replacement of a line, the higher the rank of the line the sooner that it is likely to be evicted from the cache. Among a group of highest ranking cache lines in a cache set, the cache line chosen to be replaced is one that provides the lowest latency access to a requesting entity, such as a processor. The distance separating the requesting entity from the memory partition where the cache line is stored most affects access latency.
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