Invention Application
US20080242031A1 METHOD FOR FABRICATING P-CHANNEL FIELD-EFFECT TRANSISTOR (FET)
有权
用于制造P沟道场效应晶体管(FET)的方法
- Patent Title: METHOD FOR FABRICATING P-CHANNEL FIELD-EFFECT TRANSISTOR (FET)
- Patent Title (中): 用于制造P沟道场效应晶体管(FET)的方法
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Application No.: US11692609Application Date: 2007-03-28
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Publication No.: US20080242031A1Publication Date: 2008-10-02
- Inventor: Kun-Hsien Lee , Cheng-Tung Huang , Wen-Han Hung , Shyh-Fann Ting , Li-Shian Jeng , Meng-Yi Wu , Tzyy-Ming Cheng
- Applicant: Kun-Hsien Lee , Cheng-Tung Huang , Wen-Han Hung , Shyh-Fann Ting , Li-Shian Jeng , Meng-Yi Wu , Tzyy-Ming Cheng
- Applicant Address: TW Hsinchu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method for fabrication a p-type channel FET includes forming a gate on a substrate. Then, a PAI ion implantation process is performed. Further, a pocket implantation process is conducted to form a pocket region. Thereafter, a first co-implantation process is performed to define a source/drain extension region depth profile. Then, a p-type source/drain extension region is formed. Afterwards, a second co-implantation process is performed to define a source/drain region depth profile. Thereafter, an in-situ doped epitaxy growth process is performed to form a doped semiconductor compound for serving as a p-type source/drain region.
Public/Granted literature
- US07888223B2 Method for fabricating P-channel field-effect transistor (FET) Public/Granted day:2011-02-15
Information query
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