Invention Application
- Patent Title: Adjustable interface buffer circuit between a programmable logic device and a dedicated device
- Patent Title (中): 可编程逻辑器件与专用器件之间的可调接口缓冲电路
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Application No.: US11525275Application Date: 2006-09-21
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Publication No.: US20080074141A1Publication Date: 2008-03-27
- Inventor: Ket-Chong Yap , Senani Gunaratna , Wilma Waiman Shiao
- Applicant: Ket-Chong Yap , Senani Gunaratna , Wilma Waiman Shiao
- Applicant Address: US CA Sunnyvale
- Assignee: QuickLogic Corporation
- Current Assignee: QuickLogic Corporation
- Current Assignee Address: US CA Sunnyvale
- Main IPC: H03K19/177
- IPC: H03K19/177

Abstract:
An integrated circuit includes a programmable logic device, a dedicated device, and an interface circuit between the two. The interface circuit can be easily modified to accommodate the different interface I/O demands of various dedicated devices that may be embedded into the integrated circuit. In one embodiment, the interface circuit may be implemented using a plurality of mask programmable uni-directional interface buffer circuits. The direction of any desired number of the interface buffer circuits can be reversed based on the needs of a desired dedicated device by re-routing the conductors in the interface buffer circuits in a single metal layer of the integrated circuit. In another embodiment, the interface circuit may be implemented using a hardware configurable bi-directional interface buffer circuit.
Public/Granted literature
- US08018248B2 Adjustable interface buffer circuit between a programmable logic device and a dedicated device Public/Granted day:2011-09-13
Information query
IPC分类: