发明申请
US20080024157A1 ARRAY TESTING METHOD USING ELECTRIC BIAS STRESS FOR TFT ARRAY
有权
用于TFT阵列的电气偏置应力的阵列测试方法
- 专利标题： ARRAY TESTING METHOD USING ELECTRIC BIAS STRESS FOR TFT ARRAY
- 专利标题（中）： 用于TFT阵列的电气偏置应力的阵列测试方法
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申请号： US11461381申请日： 2006-07-31
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公开(公告)号： US20080024157A1公开(公告)日： 2008-01-31
- 发明人: Myungchul Jun
- 申请人： Myungchul Jun
- 申请人地址： US CA San Jose
- 专利权人： Photon Dynamics, Inc.
- 当前专利权人： Photon Dynamics, Inc.
- 当前专利权人地址： US CA San Jose
- 主分类号： G01R31/00
- IPC分类号： G01R31/00
摘要：
A method of detecting thin film transistor (TFT) defects in a TFT-liquid crystal display (LCD) panel, includes, in part, applying a stress bias to the TFTs disposed on the panel; and detecting a change in electrical characteristics of the TFTs. The change in the electrical characteristics of the TFTs may be detected using a voltage imaging optical system or an electron beam. The panel temperature may be varied while the bias stress is being applied. The change in the electrical characteristics is optionally detected across an array of the TFTs.
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