发明申请
- 专利标题: Isolating electric paths in semiconductor device packages
- 专利标题(中): 隔离半导体器件封装中的电路径
-
申请号: US11403626申请日: 2006-04-13
-
公开(公告)号: US20070241443A1公开(公告)日: 2007-10-18
- 发明人: Adrian Ong , Dong Jeong
- 申请人: Adrian Ong , Dong Jeong
- 专利权人: Inapac Technology, Inc.
- 当前专利权人: Inapac Technology, Inc.
- 主分类号: H01L23/48
- IPC分类号: H01L23/48
摘要:
Methods, systems, and apparatus for reducing power consumption or signal distortions in a semiconductor device package. The semiconductor device package includes a semiconductor device, a first electric path, a second electric path, and an isolation element in the first electric path. The second electric path is electrically connected to the first electric path and a functional unit of the device. The isolation element separates an isolated portion in the first electric path from the second electric path, where the isolation element is configured to reduce current in the isolated portion when a signal is passing through the second electric path.
公开/授权文献
- US09899312B2 Isolating electric paths in semiconductor device packages 公开/授权日:2018-02-20
信息查询
IPC分类: