发明申请
US20070063277A1 MULTIPLE LOW AND HIGH K GATE OXIDES ON SINGLE GATE FOR LOWER MILLER CAPACITANCE AND IMPROVED DRIVE CURRENT
审中-公开
在单闸门上多个低K和高K门氧化物用于较低的电容和改进的驱动电流
- 专利标题: MULTIPLE LOW AND HIGH K GATE OXIDES ON SINGLE GATE FOR LOWER MILLER CAPACITANCE AND IMPROVED DRIVE CURRENT
- 专利标题(中): 在单闸门上多个低K和高K门氧化物用于较低的电容和改进的驱动电流
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申请号: US11162778申请日: 2005-09-22
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公开(公告)号: US20070063277A1公开(公告)日: 2007-03-22
- 发明人: Michael Belyansky , Dureseti Chidambarrao , Omer Dokumaci , Oleg Gluschenkov
- 申请人: Michael Belyansky , Dureseti Chidambarrao , Omer Dokumaci , Oleg Gluschenkov
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L27/12
- IPC分类号: H01L27/12 ; H01L27/01 ; H01L31/0392
摘要:
The present invention provides a semiconductor structure having at least one CMOS device in which the Miller capacitances, i.e., overlap capacitances, are reduced and the drive current is improved. The inventive structure includes a semiconductor substrate having at least one overlaying gate conductor, each of the at least one overlaying gate conductors has vertical edges; a first gate oxide located beneath the at least one overlaying gate conductor, the first gate oxide not extending beyond the vertical edges of the at least overlaying gate conductor; and a second gate oxide located beneath at least a portion of the at one overlaying gate conductor. In accordance with the present invention, the first gate oxide and the second gate oxide are selected from high k oxide-containing materials and low k oxide-containing materials, with the proviso that when the first gate oxide is high k, than the second gate oxide is low k, or when the first gate oxide is low k, than the second gate oxide is high k.
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