Invention Application
- Patent Title: Semiconductor device and method for manufacturing semiconductor device
- Patent Title (中): 半导体装置及半导体装置的制造方法
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Application No.: US11341444Application Date: 2006-01-30
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Publication No.: US20060180861A1Publication Date: 2006-08-17
- Inventor: Mikio Tsujiuchi , Toshiaki Iwamatsu , Shigeto Maegawa
- Applicant: Mikio Tsujiuchi , Toshiaki Iwamatsu , Shigeto Maegawa
- Applicant Address: JP Chiyoda-ku 100-6334
- Assignee: Renesas Technology Corp.
- Current Assignee: Renesas Technology Corp.
- Current Assignee Address: JP Chiyoda-ku 100-6334
- Priority: JP2005-035985 20050214; JP2005-372223 20051226
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L21/84

Abstract:
In a semiconductor device, a gate electrode, an impurity diffused region, a body potential fixing region, a first insulator, and a dummy gate electrode are provided on top of an SOI substrate consisting of an underlying silicon substrate, a buried insulator, and a semiconductor layer. The impurity diffused region is a region formed by implanting an impurity of a first conductivity type into the semiconductor layer around the gate electrode. The body potential fixing region is a region provided in the direction of an extension line of the length of the gate electrode and implanted with an impurity of a second conductivity type. The first insulator is formed at least in the portion between the body potential fixing region and the gate electrode. The dummy gate electrode is provided on the first insulator between the body potential fixing region and the gate electrode.
Public/Granted literature
- US07511342B2 Semiconductor device having SOI structure and method for manufacturing the same Public/Granted day:2009-03-31
Information query
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