Invention Application
US20050145923A1 NAND flash memory with enhanced program and erase performance, and fabrication process
审中-公开
NAND闪存具有增强的编程和擦除性能，以及制作工艺
- Patent Title: NAND flash memory with enhanced program and erase performance, and fabrication process
- Patent Title (中): NAND闪存具有增强的编程和擦除性能，以及制作工艺
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Application No.: US10753103Application Date: 2004-01-06
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Publication No.: US20050145923A1Publication Date: 2005-07-07
- Inventor: Chiou-Feng Chen , Prateep Tuntasood , Der-Tsyr Fan
- Applicant: Chiou-Feng Chen , Prateep Tuntasood , Der-Tsyr Fan
- Main IPC: G11C16/04
- IPC: G11C16/04 ; H01L21/82 ; H01L21/8247 ; H01L27/115 ; H01L29/788
Abstract:
NAND flash memory cell array and fabrication process in which control gates and floating gates are stacked in pairs arranged in rows between a bit line diffusion and a common source diffusion, with select gates on both sides of each of the pairs of stacked gates. The gates in each stacked pair are self-aligned with each other and
Abstract(Chinese):
NAND闪速存储器单元阵列和制造工艺，其中控制栅极和浮置栅极成对地堆叠成排列在位线扩散和公共源极扩散之间的行，每对堆叠栅极的两侧具有选择栅极。 每个堆叠对中的门彼此自对齐，并且时，文本丢失或难以辨认
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