Invention Application
US20050066243A1 Mechanism to enhance observability of integrated circuit failures during burn-in tests
有权
增强烧录测试期间集成电路故障的可观察性的机制
- Patent Title: Mechanism to enhance observability of integrated circuit failures during burn-in tests
- Patent Title (中): 增强烧录测试期间集成电路故障的可观察性的机制
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Application No.: US10667879Application Date: 2003-09-22
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Publication No.: US20050066243A1Publication Date: 2005-03-24
- Inventor: Gordhan Barevadia , Anupama Agashe , Nikila Krishnamoorthy , Rubin Parekhji , Neil Simpson
- Applicant: Gordhan Barevadia , Anupama Agashe , Nikila Krishnamoorthy , Rubin Parekhji , Neil Simpson
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/3185 ; G01R31/319 ; G11C29/44
Abstract:
A system and method enhance observability of IC failures during burn-in tests. Scan automatic test pattern generation and memory built-in self-test patterns are monitored during the burn-in tests to provide a mechanism for observing selective scan chain outputs and memory BIST status outputs.
Public/Granted literature
- US07120842B2 Mechanism to enhance observability of integrated circuit failures during burn-in tests Public/Granted day:2006-10-10
Information query
