Invention Grant
- Patent Title: Dual sum of quadword 16×16 multiply and accumulate
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Application No.: US17359522Application Date: 2021-06-26
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Publication No.: US12204903B2Publication Date: 2025-01-21
- Inventor: Venkateswara Madduri , Cristina Anderson , Robert Valentine , Mark Charney , Vedvyas Shanbhogue
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: NICHOLSON DE VOS WEBSTER & ELLIOTT LLP
- Main IPC: G06F9/30
- IPC: G06F9/30

Abstract:
Techniques for matrix multiplication are described. In some examples, a single instruction having a format of fields for an opcode, one or more fields to indicate a location of a source/destination operand, one or more fields to indicate a location of a first source operand, and one or more fields to indicate a location of a second source operand is used. Wherein the opcode is to indicate that execution circuitry is to: multiply values from corresponding data elements of the first and second sources, add a first subset of the multiplied values to a first value from the source/destination operand and store in a first data element position of the source/destination operand, and add a second subset of the multiplied values to a second value from the source/destination operand and store in a second data element position of the source/destination operand.
Public/Granted literature
- US20220413861A1 DUAL SUM OF QUADWORD 16X16 MULTIPLY AND ACCUMULATE Public/Granted day:2022-12-29
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