Invention Grant
- Patent Title: Diffusion barrier collar for interconnects
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Application No.: US18297829Application Date: 2023-04-10
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Publication No.: US12198981B2Publication Date: 2025-01-14
- Inventor: Rajesh Katkar , Cyprian Emeka Uzoh
- Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Applicant Address: US CA San Jose
- Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Current Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Current Assignee Address: US CA San Jose
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/68 ; H01L23/00 ; H01L23/532 ; H01L25/00 ; H01L25/065

Abstract:
Representative implementations of techniques and devices are used to reduce or prevent conductive material diffusion into insulating or dielectric material of bonded substrates. Misaligned conductive structures can come into direct contact with a dielectric portion of the substrates due to overlap, especially while employing direct bonding techniques. A barrier interface that can inhibit the diffusion is disposed generally between the conductive material and the dielectric at the overlap.
Public/Granted literature
- US20230360968A1 DIFFUSION BARRIER COLLAR FOR INTERCONNECTS Public/Granted day:2023-11-09
Information query
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