Invention Grant
- Patent Title: Joint structure in semiconductor package and manufacturing method thereof
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Application No.: US17872023Application Date: 2022-07-25
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Publication No.: US12087727B2Publication Date: 2024-09-10
- Inventor: Kuan-Yu Huang , Chih-Wei Wu , Sung-Hui Huang , Shang-Yun Hou , Ying-Ching Shih , Cheng-Chieh Li
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- The original application number of the division: US16924147 2020.07.08
- Main IPC: H01L23/00
- IPC: H01L23/00

Abstract:
A semiconductor package includes first and second package components stacked upon and electrically connected to each other, and first and second joint structures. The first package component includes first and second conductive bumps, the second package component includes third and fourth conductive bumps having dimensions greater than those of the first and second conductive bumps. The first joint structure partially covers the first and third conductive bumps. The second joint structure partially covers the second and the fourth conductive bumps. A first angle between a sidewall of the first conductive bump and a tangent line at an end point of a boundary of the first joint structure on the first conductive bump is greater than a second angle between a sidewall of the second conductive bump and a tangent line at an end point of a boundary of the second joint structure on the second conductive bump.
Public/Granted literature
- US20220359458A1 JOINT STRUCTURE IN SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2022-11-10
Information query
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