Invention Grant
- Patent Title: Method of manufacturing an integrated fan-out package having fan-out redistribution layer (RDL) to accommodate electrical connectors
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Application No.: US18068010Application Date: 2022-12-19
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Publication No.: US12080615B2Publication Date: 2024-09-03
- Inventor: Chen-Hua Yu , Kuo-Chung Yee , Hao-Yi Tsai , Tin-Hao Kuo
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/48 ; H01L23/29 ; H01L23/31 ; H01L23/498 ; H01L23/538 ; H01L25/065 ; H01L21/56
Abstract:
A method includes forming a through-via from a first conductive pad of a first device die. The first conductive pad is at a top surface of the first device die. A second device die is adhered to the top surface of the first device die. The second device die has a surface conductive feature. The second device die and the through-via are encapsulated in an encapsulating material. The encapsulating material is planarized to reveal the through-via and the surface conductive feature. Redistribution lines are formed over and electrically coupled to the through-via and the surface conductive feature.
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Information query
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