- 专利标题: Connector with staggered pin orientation
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申请号: US17128803申请日: 2020-12-21
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公开(公告)号: US12040568B2公开(公告)日: 2024-07-16
- 发明人: Xiang Li , Konika Ganguly , George Vergis
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Akona IP PC
- 主分类号: H01R13/6461
- IPC分类号: H01R13/6461 ; H01R12/70 ; H01R12/71 ; H01R13/24
摘要:
Connectors with a staggered pin orientation can reduce crosstalk amongst signal pins. In one example, a connector to couple a card or module to a motherboard includes connector housing and a plurality of pins. Each of the plurality of pins includes two ends including a card or module-facing end to couple with the card or module and a motherboard-facing end to couple with the motherboard. Each of the plurality of pins includes a middle section in the connector housing. One or both of the ends include one or more bends relative to the middle section. The plurality of pins includes alternating signal pins and ground pins, wherein the signal pins having an opposite orientation relative to the ground pins.
公开/授权文献
- US20210151916A1 CONNECTOR WITH STAGGERED PIN ORIENTATION 公开/授权日:2021-05-20
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