- 专利标题: Conductive route patterning for electronic substrates
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申请号: US17026703申请日: 2020-09-21
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公开(公告)号: US12027466B2公开(公告)日: 2024-07-02
- 发明人: Jeremy D. Ecton , Aleksandar Aleksov , Brandon C. Marin , Yonggang Li , Leonel Arana , Suddhasattwa Nad , Haobo Chen , Tarek Ibrahim
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Essential Patents Group, LLP
- 主分类号: H01L23/538
- IPC分类号: H01L23/538 ; H01L21/768 ; H05K1/11
摘要:
Conductive routes for an electronic substrate may be fabricated by forming an opening in a material, using existing laser drilling or lithography tools and materials, followed by selectively plating a metal on the sidewalls of the opening. The processes of the present description may result in significantly higher patterning resolution or feature scaling (up to 2× improvement in patterning density/resolution). In addition to improved patterning resolution, the embodiments of the present description may also result in higher aspect ratios of the conductive routes, which can result in improved signaling, reduced latency, and improved yield.
公开/授权文献
- US20220093520A1 CONDUCTIVE ROUTE PATTERNING FOR ELECTRONIC SUBSTRATES 公开/授权日:2022-03-24
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