• 专利标题: System and method of reducing delta-sigma modulator error using force-and-correction
  • 申请号: US17880868
    申请日: 2022-08-04
  • 公开(公告)号: US12015426B2
    公开(公告)日: 2024-06-18
  • 发明人: Lucien Johannes BreemsMuhammed Bolatkale
  • 申请人: NXP B.V.
  • 申请人地址: NL Endhoven
  • 专利权人: NXP B.V.
  • 当前专利权人: NXP B.V.
  • 当前专利权人地址: NL Eindhoven
  • 主分类号: H03M3/00
  • IPC分类号: H03M3/00
System and method of reducing delta-sigma modulator error using force-and-correction
摘要:
A delta-sigma modulator including force circuitry that receives an output digital signal and provides a forced digital signal with a predetermined force state based on a force control signal, a combiner that subtracts the forced digital signal from the output digital signal for providing a digital error signal, and force correction circuitry that converts the digital error signal into one or more analog error correction signals applied to corresponding inputs of loop filter circuitry. The digital error signal and the force control signal may each be used to develop corresponding analog feedback signals used to adjust an analog input signal. The digital error signal may also be converted to one or more correction signals applied to corresponding inputs of the loop filter circuitry to correct the output digital signal. The digital error signal may also be used by a digital noise cancellation filter to further correct the output digital signal.
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