Invention Grant
- Patent Title: Compacted addressing for transaction layer packets
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Application No.: US16937189Application Date: 2020-07-23
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Publication No.: US11868778B2Publication Date: 2024-01-09
- Inventor: Ganesh Dasika , Sergey Blagodurov , Seyedmohammad Seyedzadehdelcheh
- Applicant: ADVANCED MICRO DEVICES, INC.
- Applicant Address: US CA Santa Clara
- Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F9/34
- IPC: G06F9/34 ; G06F9/30 ; G06F13/16
Abstract:
Compacted addressing for transaction layer packets, including: determining, for a first epoch, one or more low entropy address bits in a plurality of first transaction layer packets; removing, from one or more memory addresses of one or more second transaction layer packets, the one or more low entropy address bits; and sending the one or more second transaction layer packets.
Public/Granted literature
- US20220027158A1 COMPACTED ADDRESSING FOR TRANSACTION LAYER PACKETS Public/Granted day:2022-01-27
Information query
