Invention Grant
- Patent Title: Offset-aligned three-dimensional integrated circuit
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Application No.: US17891444Application Date: 2022-08-19
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Publication No.: US11855061B2Publication Date: 2023-12-26
- Inventor: Brett P. Wilkerson , Milind S. Bhagavat , Rahul Agarwal , Dmitri Yudanov
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Zagorin Cave LLP
- The original application number of the division: US16799243 2020.02.24
- Main IPC: H01L25/18
- IPC: H01L25/18 ; H01L23/367 ; H01L23/00 ; H01L25/00 ; H01L23/48

Abstract:
A three-dimensional integrated circuit includes a first die structure having a first geometry. The first die structure includes a first region that operates with a first power density and a second region that operates with a second power density. The first power density is less than the second power density. The three-dimensional integrated circuit includes a second die structure having a second geometry. A stacked portion of the second die structure is aligned with the first region. The three-dimensional integrated circuit includes an additional die structure stacked with the first die structure and the second die structure. The additional die structure has the first geometry or the second geometry.
Public/Granted literature
- US20220392882A1 OFFSET-ALIGNED THREE-DIMENSIONAL INTEGRATED CIRCUIT Public/Granted day:2022-12-08
Information query
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