- 专利标题： Semiconductor arrangement and method of manufacture
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申请号： US17397035申请日： 2021-08-09
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公开(公告)号： US11843050B2公开(公告)日： 2023-12-12
- 发明人: Pei-Yu Wang , Sai-Hooi Yeong
- 申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
- 申请人地址： TW Hsin-Chu
- 专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
- 当前专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
- 当前专利权人地址： TW Hsinchu
- 代理机构： COOPER LEGAL GROUP, LLC
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L29/786 ; H01L29/08 ; H01L29/165 ; H01L21/02 ; H01L29/66 ; H01L29/06 ; H01L29/423
摘要：
A method for forming a semiconductor arrangement comprises forming a fin over a semiconductor layer. A gate structure is formed over a first portion of the fin. A second portion of the fin adjacent to the first portion of the fin and a portion of the semiconductor layer below the second portion of the fin are removed to define a recess. A stress-inducing material is formed in the recess. A first semiconductor material is formed in the recess over the stress-inducing material. The first semiconductor material is different than the stress-inducing material.
公开/授权文献
- US20210367075A1 SEMICONDUCTOR ARRANGEMENT AND METHOD OF MANUFACTURE 公开/授权日：2021-11-25
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