- 专利标题: Top-electrode barrier layer for RRAM
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申请号: US17501300申请日: 2021-10-14
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公开(公告)号: US11716915B2公开(公告)日: 2023-08-01
- 发明人: Hsing-Lien Lin , Chii-Ming Wu , Fa-Shen Jiang
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Eschweiler & Potashnik, LLC
- 主分类号: H10N70/00
- IPC分类号: H10N70/00 ; H10B63/00 ; H10N70/20
摘要:
Various embodiments of the present application are directed towards a resistive random-access memory (RRAM) cell including a top-electrode barrier layer configured to block the movement of nitrogen or some other suitable non-metal element from a top electrode of the RRAM cell to an active metal layer of the RRAM cell. Blocking the movement of non-metal element may be prevent formation of an undesired switching layer between the active metal layer and the top electrode. The undesired switching layer would increase parasitic resistance of the RRAM cell, such that top-electrode barrier layer may reduce parasitic resistance by preventing formation of the undesired switching layer.
公开/授权文献
- US20220069215A1 TOP-ELECTRODE BARRIER LAYER FOR RRAM 公开/授权日:2022-03-03
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