Invention Grant
- Patent Title: Semiconductor device having multi-layered gate spacers
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Application No.: US17145925Application Date: 2021-01-11
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Publication No.: US11682711B2Publication Date: 2023-06-20
- Inventor: Wen-Kai Lin , Che-Hao Chang , Chi On Chui , Yung-Cheng Lu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/49
- IPC: H01L29/49 ; H01L29/66 ; H01L21/8238 ; H01L29/08 ; H01L29/417 ; H01L29/78 ; H01L27/092

Abstract:
Semiconductor devices and methods of manufacture are presented in which spacers are manufactured on sidewalls of gates for semiconductor devices. In embodiments the spacers comprise a first seal, a second seal, and a contact etch stop layer, in which the first seal comprises a first shell along with a first bulk material, the second seal comprises a second shell along with a second bulk material, and the contact etch stop layer comprises a third bulk material and a second dielectric material.
Public/Granted literature
- US20210376105A1 Semiconductor Devices and Methods of Manufacture Public/Granted day:2021-12-02
Information query
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