- 专利标题: Collapsing of multiple nested loops, methods, and instructions
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申请号: US17323409申请日: 2021-05-18
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公开(公告)号: US11640298B2公开(公告)日: 2023-05-02
- 发明人: Mikhail Plotnikov , Andrey Naraikin , Elmoustapha Ould-Ahmed-Vall
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Trop, Pruner & Hu, P.C.
- 主分类号: G06F9/30
- IPC分类号: G06F9/30 ; G06F9/32
摘要:
In an embodiment, the present invention is directed to a processor including a decode logic to receive a multi-dimensional loop counter update instruction and to decode the multi-dimensional loop counter update instruction into at least one decoded instruction, and an execution logic to execute the at least one decoded instruction to update at least one loop counter value of a first operand associated with the multi-dimensional loop counter update instruction by a first amount. Methods to collapse loops using such instructions are also disclosed. Other embodiments are described and claimed.
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