Invention Grant
- Patent Title: Semiconductor package and method of manufacturing the same
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Application No.: US17010849Application Date: 2020-09-03
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Publication No.: US11637054B2Publication Date: 2023-04-25
- Inventor: Shih-Ting Hung , Meng-Liang Lin , Shin-Puu Jeng , Yi-Wen Wu , Po-Yao Chuang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/48 ; H01L23/498 ; H01L23/00 ; H01L23/31 ; H01L21/48 ; H01L21/683 ; H01L21/56 ; H01L25/16

Abstract:
A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, an encapsulant and a redistribution structure. The encapsulant laterally encapsulates the semiconductor die. The redistribution structure is disposed on the encapsulant and electrically connected with the semiconductor die, wherein the redistribution structure comprises a first conductive via, a first conductive wiring layer and a second conductive via stacked along a stacking direction, the first conductive via has a first terminal surface contacting the first conductive wiring layer, the second conductive via has a second terminal surface contacting the first conductive wiring layer, an area of a first cross section of the first conductive via is greater than an area of the first terminal surface of the first conductive via, and an area of a second cross section of the second conductive via is greater than an area of the second terminal surface of the second conductive via.
Public/Granted literature
- US20210242117A1 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2021-08-05
Information query
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