Provided are a memory controller with improved data reliability, a memory system including the memory controller, and a method of operating the memory controller. The memory controller includes an error correction code (ECC) circuit configured to perform an error detection on a codeword read from a memory device; and a processor configured to set at least one memory chip from among a plurality of memory chips as an indicator chip, monitor an error occurrence in the indicator chip based on a result of the error detection, and output reliability deterioration information indicating that the reliability of the memory device is deteriorated based on a result of the monitoring.