- 专利标题: Cache operations in a hybrid dual in-line memory module
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申请号: US17450124申请日: 2021-10-06
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公开(公告)号: US11561902B2公开(公告)日: 2023-01-24
- 发明人: Paul Stonelake , Horia C. Simionescu , Samir Mittal , Robert W. Walker , Anirban Ray , Gurpreet Anand
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Lowenstein Sandler LLP
- 主分类号: G06F12/0811
- IPC分类号: G06F12/0811 ; G06F12/0897 ; G06F12/0888 ; G06F12/0862
摘要:
A system includes a first memory device of a first memory type, a second memory device of a second memory type, and a third memory device of a third memory type. The system further includes a processing device to retrieve one or more sections of data from the first memory device comprising a first memory type, and retrieve one or more remaining sections of data from the second memory device comprising a second memory type, wherein the one or more remaining sections of data from the second memory device are associated with the one or more sections of data from the first memory device. The processing device is further to combine the one or more sections of data from the first memory device comprising the first memory type with the one or more remaining sections of each of data from the second memory device comprising the second memory type into a contiguous page, and copy the contiguous page to a third memory device comprising a third memory type.
公开/授权文献
- US20220027271A1 CACHE OPERATIONS IN A HYBRID DUAL IN-LINE MEMORY MODULE 公开/授权日:2022-01-27
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