- 专利标题： Semiconductor device having vertical DMOS and manufacturing method thereof
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申请号： US17150114申请日： 2021-01-15
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公开(公告)号： US11532741B2公开(公告)日： 2022-12-20
- 发明人: Hyun Kwang Shin
- 申请人： KEY FOUNDRY CO., LTD.
- 申请人地址： KR Cheongju-si
- 专利权人： KEY FOUNDRY CO., LTD.
- 当前专利权人： KEY FOUNDRY CO., LTD.
- 当前专利权人地址： KR Cheongju-si
- 代理机构： NSIP Law
- 优先权： KR10-2020-0104613 20200820
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L29/66 ; H01L27/092 ; H01L29/423
摘要：
A semiconductor device includes a substrate, a buried doped layer formed on the substrate, a trench gate formed on the buried doped layer, a source region formed adjacent the trench gate, an interlayer dielectric layer formed on the trench gate and the source region, a source contact plug formed to extend and connect to the source region, and a drain contact plug, extending and connecting to the buried doped layer, formed deeper than the source contact plug.
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