- 专利标题: Integrated circuit package and method
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申请号: US16882132申请日: 2020-05-22
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公开(公告)号: US11532533B2公开(公告)日: 2022-12-20
- 发明人: Chen-Hua Yu , Wei Ling Chang , Chuei-Tang Wang , Fong-yuan Chang , Chieh-Yen Chen
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Slater Matsil, LLP
- 主分类号: H01L21/02
- IPC分类号: H01L21/02 ; H01L23/31 ; H01L23/00
摘要:
In an embodiment, a device includes: a processor die including circuit blocks, the circuit blocks including active devices of a first technology node; a power gating die including power semiconductor devices of a second technology node, the second technology node larger than the first technology node; and a first redistribution structure including first metallization patterns, the first metallization patterns including power supply source lines and power supply ground lines, where a first subset of the circuit blocks is electrically coupled to the power supply source lines and the power supply ground lines through the power semiconductor devices, and a second subset of the circuit blocks is permanently electrically coupled to the power supply source lines and the power supply ground lines.
公开/授权文献
- US20210118759A1 Integrated Circuit Package and Method 公开/授权日:2021-04-22
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