- 专利标题： Automatic placement of analog design components with virtual grouping
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申请号： US17138833申请日： 2020-12-30
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公开(公告)号： US11416660B1公开(公告)日： 2022-08-16
- 发明人: Preeti Kapoor , Hui Xu , Hongzhou Liu , Sravasti G. Nair
- 申请人： Cadence Design Systems, Inc.
- 申请人地址： US CA San Jose
- 专利权人： Cadence Design Systems, Inc.
- 当前专利权人： Cadence Design Systems, Inc.
- 当前专利权人地址： US CA San Jose
- 代理机构： Vista IP Law Group, LLP
- 主分类号： G06F30/31
- IPC分类号： G06F30/31 ; G06F30/3308 ; G06N3/12 ; G06F30/392
摘要：
Disclosed is an improved approach to implement analog or mixed-signal designs. A method, system, and computer program product are provided to fully automate the analog placement step using a virtual grouping methodology which considers variable components and uses a genetic placement algorithm to find the best placement solution which fully respects the analog constraints defined by a user or auto identified by a tool.
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