Invention Grant
- Patent Title: Semiconductor device including dummy patterns and peripheral interconnection patterns at the same level
-
Application No.: US17060179Application Date: 2020-10-01
-
Publication No.: US11342263B2Publication Date: 2022-05-24
- Inventor: Jang-Gn Yun , Jaesun Yun , Joon-Sung Lim
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2014-0172283 20141203
- Main IPC: H01L27/11573
- IPC: H01L27/11573 ; H01L23/528 ; H01L23/31 ; H01L27/06 ; H01L23/522 ; H01L27/11582

Abstract:
A semiconductor device includes a cell semiconductor pattern disposed on a semiconductor substrate. A semiconductor dummy pattern is disposed on the semiconductor substrate. The semiconductor dummy pattern is co-planar with the cell semiconductor pattern. A first circuit is disposed between the semiconductor substrate and the cell semiconductor pattern. A first interconnection structure is disposed between the semiconductor substrate and the cell semiconductor pattern. A first dummy structure is disposed between the semiconductor substrate and the cell semiconductor pattern. Part of the first dummy structure is co-planar with part of the first interconnection structure. A second dummy structure not overlapping the cell semiconductor pattern is disposed on the semiconductor substrate. Part of the second dummy structure is co-planar with part of the first interconnection structure. A conductive shielding pattern is disposed between the cell semiconductor pattern and the semiconductor substrate and above the first circuit and the first interconnection structure.
Public/Granted literature
- US20210020563A1 SEMICONDUCTOR DEVICE Public/Granted day:2021-01-21
Information query
IPC分类: