A variable-latency computing device includes a computing module, enabling units, a storage operation unit, and a detecting controller. The enabling units are divided into at least two groups. The storage operation unit includes word lines and bit lines. The enabling units enable the word line. The storage operation unit accumulates the data values corresponding to the bit lines and the enabled word line, thereby computing first accumulation values. The detecting controller controls the computing module to stop receiving the first accumulation values when the sum of the first accumulation values is higher than a threshold value and takes turns to turn off the at least two groups. The storage operation unit computes second accumulation values during different periods. The computing module receives and computes the second accumulation values corresponding to the at least two groups, so as to generate a computation value.