Invention Grant
- Patent Title: Work function layers for transistor gate electrodes
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Application No.: US16690645Application Date: 2019-11-21
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Publication No.: US11183574B2Publication Date: 2021-11-23
- Inventor: Chung-Liang Cheng , Ziwei Fang , Chun-I Wu , Huang-Lin Chao
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/66 ; H01L21/8234 ; H01L29/78

Abstract:
The embodiments described herein are directed to a method for the fabrication of transistors with aluminum-free n-type work function layers as opposed to aluminum-based n-type work function layers. The method includes forming a channel portion disposed between spaced apart source/drain epitaxial layers and forming a gate stack on the channel portion, where forming the gate stack includes depositing a high-k dielectric layer on the channel portion and depositing a p-type work function layer on the dielectric layer. After depositing the p-type work function layer, forming without a vacuum break, an aluminum-free n-type work function layer on the p-type work function layer and depositing a metal on the aluminum-free n-type work function layer. The method further includes depositing an insulating layer to surround the spaced apart source/drain epitaxial layers and the gate stack.
Public/Granted literature
- US20200373400A1 Work Function Layers for Transistor Gate Electrodes Public/Granted day:2020-11-26
Information query
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