Invention Grant
- Patent Title: System, apparatus and method for dynamic automatic sub-cacheline granularity memory access control
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Application No.: US16203891Application Date: 2018-11-29
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Publication No.: US10942851B2Publication Date: 2021-03-09
- Inventor: Wim Heirman , Stijn Eyerman , Kristof Du Bois , Ibrahim Hur , Joshua B. Fryman
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0804

Abstract:
In one embodiment, an apparatus includes a memory access circuit to receive memory access instructions and provide at least some of the memory access instructions to a memory subsystem for execution. The memory access circuit may have a conversion circuit to convert the first memory access instruction to a first subline memory access instruction, e.g., based at least in part on an access history for a first memory access instruction. Other embodiments are described and claimed.
Public/Granted literature
- US20200174929A1 System, Apparatus And Method For Dynamic Automatic Sub-Cacheline Granularity Memory Access Control Public/Granted day:2020-06-04
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