- 专利标题: System, apparatus and method for dynamic automatic sub-cacheline granularity memory access control
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申请号: US16203891申请日: 2018-11-29
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公开(公告)号: US10942851B2公开(公告)日: 2021-03-09
- 发明人: Wim Heirman , Stijn Eyerman , Kristof Du Bois , Ibrahim Hur , Joshua B. Fryman
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Trop, Pruner & Hu, P.C.
- 主分类号: G06F12/08
- IPC分类号: G06F12/08 ; G06F12/0804
摘要:
In one embodiment, an apparatus includes a memory access circuit to receive memory access instructions and provide at least some of the memory access instructions to a memory subsystem for execution. The memory access circuit may have a conversion circuit to convert the first memory access instruction to a first subline memory access instruction, e.g., based at least in part on an access history for a first memory access instruction. Other embodiments are described and claimed.
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