- 专利标题: III-V transistor device with self-aligned doped bottom barrier
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申请号: US15884503申请日: 2018-01-31
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公开(公告)号: US10937871B2公开(公告)日: 2021-03-02
- 发明人: Cheng-Wei Cheng , Pranita Kerber , Amlan Majumdar , Yanning Sun
- 申请人: International Business Machines Corporation
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Cantor Colburn LLP
- 代理商 L. Jeffrey Kelly
- 主分类号: H01L29/205
- IPC分类号: H01L29/205 ; H01L29/66 ; H01L21/306 ; H01L21/762 ; H01L29/51 ; H01L29/45 ; H01L29/417 ; H01L21/265 ; H01L29/207 ; H01L29/06
摘要:
A semiconductor device comprises a first layer of a substrate arranged on a second layer of the substrate the second layer of the substrate including a doped III-V semiconductor material barrier layer, a gate stack arranged on a channel region of the first layer of a substrate, a spacer arranged adjacent to the gate stack on the first layer of the substrate, an undoped epitaxially grown III-V semiconductor material region arranged on the second layer of the substrate, and an epitaxially grown source/drain region arranged on the undoped epitaxially grown III-V semiconductor material region, and a portion of the first layer of the substrate.
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