- 专利标题: Delayed error processing
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申请号: US15610067申请日: 2017-05-31
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公开(公告)号: US10929232B2公开(公告)日: 2021-02-23
- 发明人: Subhankar Panda , Sarathy Jayakumar , Gaurav Porwal , Theodros Yigzaw
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Patent Capital Group
- 主分类号: G06F11/00
- IPC分类号: G06F11/00 ; G06F11/14 ; G06F11/07 ; G06F11/20
摘要:
A computing apparatus, including: a hardware platform including a processor and memory; and a system management interrupt (SMI) handler; first logic configured to provide a first container and a second container via the hardware platform; and second logic configured to: detect an uncorrectable error in the first container; responsive to the detecting, generate a degraded system state; provide a degraded state message to the SMI handler; instruct the second container to seek a recoverable state; determine that the second container has entered a recoverable state; and initiate a recovery operation.
公开/授权文献
- US20180349231A1 DELAYED ERROR PROCESSING 公开/授权日:2018-12-06
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