Invention Grant
- Patent Title: Post development treatment method and material for shrinking critical dimension of photoresist layer
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Application No.: US16048455Application Date: 2018-07-30
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Publication No.: US10915027B2Publication Date: 2021-02-09
- Inventor: Siao-Shan Wang , Ching-Yu Chang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: G03F7/40
- IPC: G03F7/40 ; G03F7/30 ; G03F7/00

Abstract:
A lithography method is provided in accordance with some embodiments. The lithography method includes forming a patterned photoresist on a material layer, applying a first bonding material to a side surface of the patterned photoresist, performing a treatment on the first bonding material to bond the first bonding material to the side surface of the patterned photoresist, wherein the treatment creates a bonding site on the first bonding material configured to bond to a second bonding material, applying the second bonding material to a side surface of the first bonding material, and patterning the material layer by selectively processing a portion of the material layer exposed by the patterned photoresist, the first bonding material, and the second bonding material.
Public/Granted literature
- US20180335700A1 Post Development Treatment Method and Material for Shrinking Critical Dimension of Photoresist Layer Public/Granted day:2018-11-22
Information query
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