- 专利标题: Dual edge synchronization of analog input to reduce switch point jitter
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申请号: US15966572申请日: 2018-04-30
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公开(公告)号: US10797851B2公开(公告)日: 2020-10-06
- 发明人: Jay M. Towne , Steven E. Snyder , Steven Ricco , Matthew Nealon
- 申请人: Allegro MicroSystems, LLC
- 申请人地址: US NH Manchester
- 专利权人: Allegro MicroSystems, LLC
- 当前专利权人: Allegro MicroSystems, LLC
- 当前专利权人地址: US NH Manchester
- 代理机构: Daly, Crowley, Mofford & Durkee, LLP
- 主分类号: H04L7/00
- IPC分类号: H04L7/00 ; G01D18/00 ; G01J1/44 ; G01K15/00 ; G01R35/00
摘要:
A method for synchronization of an input signal includes providing the input signal to a first signal path associated with a first clock and to a second signal path associated with a second clock, detecting an edge of the input signal by detecting values of the input signal along the first signal path at a first rising edge of the first clock and at a second rising edge of the first clock, detecting a value of the input signal along the second signal path at an edge of the second clock, and selecting the input signal from the first signal path or from the second signal path according to the detected value of the input signal along the second path when an edge of the input signal along the first path is detected.
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