发明授权
- 专利标题: Standalone interface for stacked silicon interconnect (SSI) technology integration
-
申请号: US15237384申请日: 2016-08-15
-
公开(公告)号: US10784121B2公开(公告)日: 2020-09-22
- 发明人: Rafael C. Camarota
- 申请人: Xilinx, Inc.
- 申请人地址: US CA San Jose
- 专利权人: XILINX, INC.
- 当前专利权人: XILINX, INC.
- 当前专利权人地址: US CA San Jose
- 代理机构: Patterson + Sheridan, LLP
- 主分类号: H01L25/065
- IPC分类号: H01L25/065 ; H01L23/538 ; H01L21/48 ; H01L29/06 ; H01L25/18 ; H01L23/00
摘要:
Methods and apparatus are described for adding one or more features (e.g., high bandwidth memory (HBM)) to an existing qualified stacked silicon interconnect (SSI) technology programmable IC die (e.g., a super logic region (SLR)) without changing the programmable IC die (e.g., adding or removing blocks). One example integrated circuit (IC) package generally includes a package substrate; at least one interposer disposed above the package substrate and comprising a plurality of interconnection lines; a programmable IC die disposed above the interposer; a fixed feature die disposed above the interposer; and an interface die disposed above the interposer and configured to couple the programmable IC die to the fixed feature die using a first set of interconnection lines routed through the interposer between the programmable IC die and the interface die and a second set of interconnection lines routed through the interposer between the interface die and the fixed feature die.
公开/授权文献
信息查询
IPC分类: