Pipelined analog-to-digital converters (ADCs) include a flash ADC that reduces noise tones in power supply current drawn by the flash ADC. A pipelined analog-to-digital converter (ADC) includes a flash ADC and error correction circuitry coupled to the flash ADC. The flash ADC includes a plurality of latched comparators and a plurality of driver circuits. Each of the latched comparators includes an inverting output and a non-inverting output. Each of the driver circuits is coupled to one of the latched comparators, and includes an input terminal and an output terminal. In a first subset of the driver circuits the input terminal is coupled to the inverting output of one of the latched comparators. In a second subset of the driver circuits the input terminal is coupled to the non-inverting output of one of the latched comparators.