Invention Grant
- Patent Title: Processors, methods, and systems with a configurable spatial accelerator having a sequencer dataflow operator
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Application No.: US15721802Application Date: 2017-09-30
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Publication No.: US10380063B2Publication Date: 2019-08-13
- Inventor: Jinjie Tang , Kermin E. Fleming , Simon C. Steely , Kent D. Glossop , Jim Sukha
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: H03K19/177
- IPC: H03K19/177 ; G06F15/78 ; G06F9/38 ; G06F9/30

Abstract:
Systems, methods, and apparatuses relating to a sequencer dataflow operator of a configurable spatial accelerator are described. In one embodiment, an interconnect network between a plurality of processing elements receives an input of a dataflow graph comprising a plurality of nodes forming a loop construct, wherein the dataflow graph is overlaid into the interconnect network and the plurality of processing elements with each node represented as a dataflow operator in the plurality of processing elements and at least one dataflow operator controlled by a sequencer dataflow operator of the plurality of processing elements, and the plurality of processing elements is to perform an operation when an incoming operand set arrives at the plurality of processing elements and the sequencer dataflow operator generates control signals for the at least one dataflow operator in the plurality of processing elements.
Public/Granted literature
Information query
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