Invention Grant
- Patent Title: Localized high density substrate routing
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Application No.: US15620555Application Date: 2017-06-12
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Publication No.: US10366951B2Publication Date: 2019-07-30
- Inventor: Robert Starkston , Debendra Mallik , John S. Guzek , Chia-Pin Chiu , Deepak Kulkarni , Ravindranath V. Mahajan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/522 ; H01L23/538 ; H01L25/00 ; H01L25/065 ; H01L25/18 ; H01L21/56 ; H01L23/00

Abstract:
Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.
Public/Granted literature
- US20170287831A1 LOCALIZED HIGH DENSITY SUBSTRATE ROUTING Public/Granted day:2017-10-05
Information query
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