Invention Grant
- Patent Title: Reducing tip-to-tip distance between end portions of metal lines formed in an interconnect layer of an integrated circuit (IC)
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Application No.: US15825231Application Date: 2017-11-29
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Publication No.: US10347579B2Publication Date: 2019-07-09
- Inventor: Jeffrey Junhao Xu
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: W&T/Qualcomm
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L23/532 ; H01L31/09 ; H01L21/768 ; H01L23/50

Abstract:
Aspects for reducing tip-to-tip distance between end portions of metal lines formed in an interconnect layer of an integrated circuit (IC) are provided. In one aspect, a method includes exposing a photoresist layer disposed over a hardmask layer to a light to form a metal line pattern on the photoresist layer. The metal line pattern includes metal line templates corresponding to tracks substantially parallel to an axis. The sections of the photoresist layer corresponding to the metal line pattern are removed to expose the hardmask layer according to the metal line pattern. The exposed portions of the hardmask layer are etched such that trenches are formed corresponding to the metal line pattern. The hardmask layer is directionally etched such that at least one trench is extended in a first direction along the axis. This allows the trenches to be spaced with a reduced pitch and reduced tip-to-tip distance.
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