Invention Grant
- Patent Title: Nanosheet transistors having different gate dielectric thicknesses on the same chip
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Application No.: US15846447Application Date: 2017-12-19
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Publication No.: US10249539B2Publication Date: 2019-04-02
- Inventor: Kangguo Cheng , Juntao Li , Geng Wang , Qintao Zhang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/84 ; H01L27/12 ; H01L29/06 ; H01L29/423 ; H01L21/86 ; H01L21/306 ; H01L21/3065

Abstract:
Embodiments are directed to a method and resulting structures for forming thin and thick gate dielectric nanosheet transistors on the same chip. A first nanosheet stack having a first sacrificial layer between a first nanosheet and a second nanosheet is formed on a substrate. A second nanosheet stack having a first sacrificial layer between a first nanosheet and a second nanosheet is formed on the substrate. The first nanosheet of the first nanosheet stack is doped and concurrently removed with the first sacrificial layer of the first nanosheet stack and the first sacrificial layer of the second nanosheet stack.
Public/Granted literature
- US20180197784A1 NANOSHEET TRANSISTORS HAVING DIFFERENT GATE DIELECTRIC THICKNESSES ON THE SAME CHIP Public/Granted day:2018-07-12
Information query
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